-
- Downloads
Initial commit.
parents
Branches
Tags
Showing
- CHANGELOG.md 3 additions, 0 deletionsCHANGELOG.md
- README.md 3 additions, 0 deletionsREADME.md
- grammars/tl-verilog.cson 230 additions, 0 deletionsgrammars/tl-verilog.cson
- index.less 1 addition, 0 deletionsindex.less
- package.json 13 additions, 0 deletionspackage.json
- styles/base.less 263 additions, 0 deletionsstyles/base.less
- styles/syntax-variables.less 31 additions, 0 deletionsstyles/syntax-variables.less
CHANGELOG.md
0 → 100644
README.md
0 → 100644
grammars/tl-verilog.cson
0 → 100644
index.less
0 → 100644
package.json
0 → 100644
{ | |||
"name": "tl-verilog", | |||
"version": "0.0.0", | |||
"description": "TL-Verilog support", | |||
"keywords": [], | |||
"repository": "https://github.com/dbogatov/tlv-atom", | |||
"license": "MIT", | |||
"engines": { | |||
"atom": ">=1.0.0 <2.0.0" | |||
}, | |||
"dependencies": {} | |||
} | |||
\ No newline at end of file |
styles/base.less
0 → 100644
styles/syntax-variables.less
0 → 100644
Please register or sign in to comment